Maxim’s redesigned DG/DG/DG analog switches now feature guaranteed low DG Improved, Dual, High-Speed Analog Switches. Data Sheet. Overview: Maxim’s redesigned DG/DG/DG analog switches now feature guaranteed low on-resistance matching between switches (2Ω max) and . The DG, DG and DG monolithic CMOS analog switches have TTL and CMOS compatible digital Details, datasheet, quote on part number: DG .

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Information furnished by Intersil is believed to be accurate and reliable.

Low charge injection simpli? One control signal selects the timing capacitor C1 or C2. For information regarding Intersil Corporation and its products, see web site http: An epitaxial layer prevents the latch-up associated with older CMOS technologies. Single or Split Supply Operation Applications?

DG Datasheet(PDF) – Intersil Corporation

CL includes fixture and stray capacitance. The output of A2 is fed back to A3 and compared to the analog input eIN. The analog switches are bilateral, equally matched for AC or bidirectional signals. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. No license is granted dafasheet implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.


Limit forward diode datashheet to maximum current ratings. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?

Datasheet «DG403»

Sample and Hold Circuits? Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Another one selects eIN or discharges the capacitor in preparation for the next integration cycle.

This allows C1 to charge up to the analog input voltage. Refer to Figure 1 for test conditions.

DG (INTERSIL) PDF技术资料下载 DG 供应信息 IC Datasheet 数据表 (5/44 页)

The system will therefore store the most positive analog input experienced. Low Power Consumption PD. Peak Detector A3 acting as a comparator provides the logic drive for operating SW1.

The pinout is similar, permitting a standard layout to be used, choosing the switch function as needed.

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Logic input waveform is inverted for switches that have the opposite logic sense. The 44V maximum voltage range permits controlling 30VP-P signals. Intersil semiconductor products are sold by description only.


For load conditions, see Specifications. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use.

These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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